Adimtech APDCAM Manual de Instruções descarregar pdf (Página 76)

10 GB Communication

Version

1.0

& Control Card Instruction Manual

Bit 4 : Flash 1 Error (Web Server

Flash)

Bit 5 : Flash 2 Error (Storage Flash)

Bit 7..15 : Reserved (0)

189

190

IIC Error (

LSB first!

)

Bit 0 : No ACK received

Bit 1 : Address overflow

Bit 2 : Polling Error

Bit 3..15 : Reserved (0)

191

Test code read from the FPGA (0x5C)

192

FPGA Program Version High

193

FPGA Program Version Low

194

FPGA Status

Bit 0 : Basic PLL Locked

Bit 1 : Serial PLL Locked

Bit 2 : External DCM Locked

Bit 3 : External Clock Valid

Bit 5..4 : CAM Timer state (00 – Idle, 01 – Armed, 10 - Running)

Bit 6 : Streaming ADC Board data

Bit 7 : Overload

195

Stream Port Ethernet Status

Bit 0 : XGMII RX DCM Locked

Bit 1 : XGMII Link

Bit 2 : Reserved for internal use (TX Buffer is full)

Bit 7..3 : Reserved (0)

196

197

External Clock Frequency in kHz (MSB first)

198

DSLV Lock Status

199

200

Stream Port RX Error Counter

(MSB first)

201

202

Stream Port RX Overflow Counter (MSB first)

(MSB first)

203

204

Stream Port RX Packet Counter (MSB first)

205

Trigger Status

206

214

Reserved (0x00)

215

218

Status (

LSB first!

)

bit 31..2 – Reserved (0)

bit 1 – Storage Flash is busy (1) or free (0)

bit 0 – WEB Flash is busy (1) or free (0)

219

DDToIP Version 1 Instruction Counter

(

LSB first!

)

1 2 ... 71 72 73 74 75 76 77 78 79 80 81 82 83

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Adimtech APDCAM Manual de Instruções Página 76

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